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 PD -97131A
IRF6724MPBF IRF6724MTRPbF
RoHs Compliant and Halogen Free VDSS VGS RDS(on) RDS(on) l Low Profile (<0.7 mm) 30V max 20V max 1.9m@ 10V 2.7m@ 4.5V l Dual Sided Cooling Compatible l Ultra Low Package Inductance Qg tot Qgd Qgs2 Qrr Qoss Vgs(th) l Optimized for High Frequency Switching 33nC 10nC 3.9nC 34nC 20nC 1.8V l Ideal for CPU Core DC-DC Converters l Optimized for Sync. FET socket of Sync. Buck Converter l Low Conduction and Switching Losses l Compatible with existing Surface Mount Techniques l 100% Rg tested
l
Typical values (unless otherwise specified)
DirectFET Power MOSFET
MX
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
DirectFET ISOMETRIC
SQ
SX
ST
MQ
MX
MT
MP
Description
The IRF6724MPBF combines the latest HEXFET(R) Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6724MPBF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6724MPBF has been optimized for parameters that are critical in synchronous buck including Rds(on), gate charge and Cdv/dt-induced turn on immunity. The IRF6724MPBF offers particularly low Rds(on) and high Cdv/dt immunity for synchronous FET applications.
Absolute Maximum Ratings
Parameter
VDS VGS ID @ TA = 25C ID @ TA = 70C ID @ TC = 25C IDM EAS IAR
8
Typical R DS (on) (m)
Max.
Units
V
Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Single Pulse Avalanche Energy Avalanche CurrentAg
ID = 27A
g
e e f
h
VGS, Gate-to-Source Voltage (V)
30 20 27 21 150 212 12 21
12 10 8 6 4 2 0 0 20 40 60 80 ID= 21A VDS = 24V VDS= 15V
A
mJ A
6 4 2 0 2.0 4.0 6.0 8.0 VGS, Gate-to-Source Voltage (V) 10.0
TJ = 125C TJ = 25C
100
Notes: Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Surface mounted on 1 in. square Cu board, steady state.
Fig 1. Typical On-Resistance Vs. Gate Voltage
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
TC measured with thermocouple mounted to top (Drain) of part. Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25C, L = 0.051mH, RG = 25, IAS = 21A.
04/30/09
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1
IRF6724MPBF
Static @ TJ = 25C (unless otherwise specified)
Parameter
BVDSS VDSS/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min.
30 --- --- --- 1.35 --- --- --- --- --- 130 --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. Max. Units
--- 22 1.90 2.70 1.8 -6.1 --- --- --- --- --- 33 8.5 3.9 10 11 14 20 1.2 11 19 23 16 4404 885 424 --- ---
Conditions
VGS = 0V, ID = 250A V mV/C Reference to 25C, ID = 1mA 2.50 m VGS = 10V, ID = 27A VGS = 4.5V, ID = 21A 3.50 2.35 --- 1.0 150 100 -100 --- 54 --- --- --- --- --- --- 2.2 --- --- --- --- --- --- --- pF VGS = 0V VDS = 15V = 1.0MHz ns nC
V mV/C A nA S
VDS = VGS, ID = 100A VDS = 24V, VGS = 0V
i i
VDS = 24V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VDS = 15V, ID =21A VDS = 15V nC VGS = 4.5V ID = 21A See Fig. 15 VDS = 16V, VGS = 0V VDD = 15V, VGS = 4.5VAi ID = 21A RG= 1.8
Diode Characteristics
Parameter
IS ISM VSD trr Qrr Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)Ag Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge --- --- --- --- 20 34 1.0 30 51 V ns nC --- --- 212
Min.
---
Typ. Max. Units
--- 150 A
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 21A, VGS = 0V TJ = 25C, IF =21A di/dt = 300A/s
i
i
Notes:
Repetitive rating; pulse width limited by max. junction temperature. Pulse width 400s; duty cycle 2%.
2
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IRF6724MPBF
Absolute Maximum Ratings
PD @TA = 25C PD @TA = 70C PD @TC = 25C TP TJ TSTG Power Dissipation Power Dissipation Power Dissipation Peak Soldering Temperature Operating Junction and Storage Temperature Range
e e f
Parameter
Max.
2.8 1.8 89 270 -40 to + 150
Units
W
C
Thermal Resistance
RJA RJA RJA RJC RJ-PCB Junction-to-Ambient Junction-to-Ambient Junction-to-Ambient Junction-to-Case Junction-to-PCB Mounted Linear Derating Factor
100
el jl kl fl
Parameter
Typ.
--- 12.5 20 --- 1.0 0.022
Max.
45 --- --- 1.4 ---
Units
C/W
eA
W/C
D = 0.50
Thermal Response ( ZthJA )
10
0.20 0.10 0.05
1
0.02 0.01
J J 1 1
R1 R1 2
R2 R2
R3 R3 3
R4 R4 a
2
3
4
4
0.1
SINGLE PULSE ( THERMAL RESPONSE )
0.01 1E-006 1E-005 0.0001 0.001 0.01
Ci= i/Ri Ci i/Ri
Ri (C/W) (sec) 0.99292 0.000074 2.171681 0.007859 24.14602 0.959 17.69469 32.6
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + Tc
0.1 1 10 100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Used double sided cooling, mounting pad with large heatsink. Mounted on minimum footprint full size board with metalized
back and with small clip heatsink. Notes:
R is measured at TJ of approximately 90C.
Surface mounted on 1 in. square Cu (still air).
Mounted to a PCB with small clip heatsink (still air)
Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air)
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3
IRF6724MPBF
1000
TOP VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V
1000
TOP VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10 2.5V 1
10
2.5V
60s PULSE WIDTH
Tj = 25C 0.1 0.1 1 10 100 VDS , Drain-to-Source Voltage (V)
60s PULSE WIDTH
Tj = 150C 1 0.1 1 10 100 VDS , Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
1000 2.0
Fig 5. Typical Output Characteristics
ID = 27A
ID, Drain-to-Source Current()
VGS = 4.5V
Typical RDS(on) (Normalized)
100 TJ = 150C TJ = 25C 10 TJ = -40C
VGS = 10V 1.5
1.0
1 VDS = 10V 60s PULSE WIDTH 0.1 1.5 2.0 2.5 3.0 3.5 4.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature (C)
VGS, Gate-to-Source Voltage (V)
Fig 6. Typical Transfer Characteristics
100000
VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd
Fig 7. Normalized On-Resistance vs. Temperature
6 Vgs = 3.5V Vgs = 4.0V Vgs = 4.5V Vgs = 5.0V Vgs = 10V
10000 Ciss
Typical RDS (on) (m)
Coss = Cds + Cgd
5
C, Capacitance(pF)
4
1000
Coss Crss
3
2 TJ = 25C
100 1 10 VDS, Drain-to-Source Voltage (V) 100
1 0 20 40 60 80 100
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
Fig 9. Typical On-Resistance Vs. Drain Current and Gate Voltage
ID, Drain Current (A)
4
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IRF6724MPBF
1000.0
ID, Drain-to-Source Current (A)
1000
OPERATION IN THIS AREA LIMITED BY R DS(on)
ISD, Reverse Drain Current (A)
100.0
TJ = 150C TJ = 25C TJ = -40C
100
10.0
10 10msec 1 TA = 25C Tj = 150C Single Pulse 0.1 1.0
100sec
1.0 VGS = 0V 0.1 0.2 0.4 0.6 0.8 1.0 1.2 VSD, Source-to-Drain Voltage (V)
1msec
0.1 10.0 100.0 VDS , Drain-toSource Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
Typical VGS(th) Gate threshold Voltage (V)
150
2.5
Fig11. Maximum Safe Operating Area
ID, Drain Current (A)
2.0
100
ID = 100A
1.5
50
1.0
0 25 50 75 100 125 150 TC , Case Temperature (C)
0.5 -75 -50 -25 0 25 50 75 100 125 150
TJ , Junction Temperature ( C )
Fig 12. Maximum Drain Current vs. Case Temperature
EAS, Single Pulse Avalanche Energy (mJ)
50
Fig 13. Typical Threshold Voltage vs. Junction Temperature
ID 7.2A 8.4A BOTTOM 21A
TOP
40
30
20
10
0 25 50 75 100 125 150
Starting TJ, Junction Temperature (C)
Fig 14. Maximum Avalanche Energy Vs. Drain Current
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5
IRF6724MPBF
Id Vds Vgs
L
0
DUT 1K
VCC
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Fig 15a. Gate Charge Test Circuit
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
tp
DRIVER
VDS
L
VGS RG
D.U.T
IAS tp
+ - VDD
A
20V
0.01
I AS
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
VDS VGS RG
RD
90%
D.U.T.
+
VDS
- VDD
10%
V10V GS
Pulse Width 1 s Duty Factor 0.1 %
VGS
td(on) tr td(off) tf
Fig 17a. Switching Time Test Circuit
Fig 17b. Switching Time Waveforms
6
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IRF6724MPBF
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * di/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage
Body Diode
Forward Drop
Inductor Curent Inductor Current
Ripple 5% ISD
* VGS = 5V for Logic Level Devices Fig 18. Diode Reverse Recovery Test Circuit for N-Channel HEXFET(R) Power MOSFETs
DirectFET Board Footprint, MX Outline (Medium Size Can, X-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
G = GATE D = DRAIN S = SOURCE
D S G S D
D
D
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7
IRF6724MPBF
DirectFET Outline Dimension, MX Outline (Medium Size Can, X-Designation).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
DIMEN SION S
ME TRIC CO DE A B C D E F G H J K L M R P MIN 6.25 4.80 3.85 0.35 0.68 0.68 1.38 0.80 0.38 0.88 2.28 0.616 0.020 0.08 M AX 6.35 5.05 3.95 0.45 0.72 0.72 1.42 0.84 0.42 1.01 2.41 0.676 0.080 0.17 IMPE RIAL M IN 0.246 0.189 0.152 0.014 0.027 0.027 0.054 0.032 0.015 0.035 0.090 0.0235 0.0008 0.003 MAX 0.250 0.201 0.156 0.018 0.028 0.028 0.056 0.033 0.017 0.039 0.095 0.0274 0.0031 0.007
DirectFET Part Marking
GATE MARKING LOGO
6724
PART NUMBER BATCH NUMBER DATE CODE
Line above the last character of the date code indicates "Lead-Free"
8
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IRF6724MPBF
DirectFET Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6724MTRPbF) For 1000 parts on 7" IRF6714MTRPBF). reel, order IRF6724MTR1PbF IRF6714MTR1PBF STANDARD OPTION METRIC CODE MIN MAX A 330.0 N.C B 20.2 N.C C 12.8 13.2 D 1.5 N.C E 100.0 N.C F N.C 18.4 G 12.4 14.4 H 11.9 15.4 REEL DIMENSIONS (QTY 4800) TR1 OPTION IMPERIAL METRIC MIN MIN MAX MAX 12.992 177.77 N.C N.C 0.795 19.06 N.C N.C 0.504 13.5 0.520 12.8 0.059 1.5 N.C N.C 3.937 58.72 N.C N.C N.C N.C 0.724 13.50 0.488 11.9 0.567 12.01 0.469 11.9 0.606 12.01 (QTY 1000) IMPERIAL MAX MIN 6.9 N.C 0.75 N.C 0.50 0.53 0.059 N.C 2.31 N.C N.C 0.53 0.47 N.C 0.47 N.C
LOADED TAPE FEED DIRECTION
NOTE: CONTROLLING DIMENSIONS IN MM
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.04/2009
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6724
CODE A B C D E F G H DIMENSIONS METRIC IMPERIAL MIN MAX MIN MAX 0.311 0.319 8.10 7.90 0.154 0.161 3.90 4.10 0.484 0.469 12.30 11.90 0.215 0.219 5.55 5.45 0.209 0.201 5.30 5.10 0.256 0.264 6.70 6.50 0.059 N.C 1.50 N.C 0.059 0.063 1.60 1.50
Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR's Web site.
9


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